* Single/Dual Cycle Deselect selectable
* IEEE 1149.1 JTAG-compatible Boundary Scan
* ZQ mode pin for user-selectable high/low output drive
* 3.3 V or 2.5.

* JEDEC-standard 209-bump BGA package
* RoHS-compliant 209-bump BGA package available with the Linear Burst Ord.

18Mb S/DCD Sync Burst SRAMs

GS816272C

GS816218DB-150

GS816218DB-200

GS816218DB-250

GS816218DB-333

GS816218DB-375

GS816218DB-400

GS816218DB-xxxV

GS816218DD-150

GS816218DD-200

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